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Erik Tylek Kettenburg
380
digistump-sam/system/libsam/source/twi.c
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380
digistump-sam/system/libsam/source/twi.c
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/* ----------------------------------------------------------------------------
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* SAM Software Package License
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* ----------------------------------------------------------------------------
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* Copyright (c) 2011-2012, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following condition is met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/** \addtogroup twi_module Working with TWI
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* The TWI driver provides the interface to configure and use the TWI
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* peripheral.
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*
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* \section Usage
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* <ul>
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* <li> Configures a TWI peripheral to operate in master mode, at the given
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* frequency (in Hz) using TWI_Configure(). </li>
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* <li> Sends a STOP condition on the TWI using TWI_Stop().</li>
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* <li> Starts a read operation on the TWI bus with the specified slave using
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* TWI_StartRead(). Data must then be read using TWI_ReadByte() whenever
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* a byte is available (poll using TWI_ByteReceived()).</li>
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* <li> Starts a write operation on the TWI to access the selected slave using
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* TWI_StartWrite(). A byte of data must be provided to start the write;
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* other bytes are written next.</li>
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* <li> Sends a byte of data to one of the TWI slaves on the bus using TWI_WriteByte().
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* This function must be called once before TWI_StartWrite() with the first byte of data
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* to send, then it shall be called repeatedly after that to send the remaining bytes.</li>
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* <li> Check if a byte has been received and can be read on the given TWI
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* peripheral using TWI_ByteReceived().<
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* Check if a byte has been sent using TWI_ByteSent().</li>
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* <li> Check if the current transmission is complete (the STOP has been sent)
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* using TWI_TransferComplete().</li>
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* <li> Enables & disable the selected interrupts sources on a TWI peripheral
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* using TWI_EnableIt() and TWI_DisableIt().</li>
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* <li> Get current status register of the given TWI peripheral using
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* TWI_GetStatus(). Get current status register of the given TWI peripheral, but
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* masking interrupt sources which are not currently enabled using
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* TWI_GetMaskedStatus().</li>
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* </ul>
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* For more accurate information, please look at the TWI section of the
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* Datasheet.
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*
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* Related files :\n
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* \ref twi.c\n
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* \ref twi.h.\n
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*/
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/*@{*/
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/*@}*/
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/**
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* \file
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*
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* Implementation of Two Wire Interface (TWI).
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*
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*/
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/*----------------------------------------------------------------------------
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* Headers
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*----------------------------------------------------------------------------*/
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#include "chip.h"
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#include <stdlib.h>
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#include <assert.h>
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/**
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* \brief Configures a TWI peripheral to operate in master mode, at the given
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* frequency (in Hz). The duty cycle of the TWI clock is set to 50%.
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* \param pTwi Pointer to an Twi instance.
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* \param twck Desired TWI clock frequency.
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* \param mck Master clock frequency.
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*/
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void TWI_ConfigureMaster( Twi* pTwi, uint32_t dwTwCk, uint32_t dwMCk )
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{
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uint32_t dwCkDiv = 0 ;
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uint32_t dwClDiv ;
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uint32_t dwOk = 0 ;
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assert( pTwi ) ;
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/* SVEN: TWI Slave Mode Enabled */
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pTwi->TWI_CR = TWI_CR_SVEN ;
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/* Reset the TWI */
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pTwi->TWI_CR = TWI_CR_SWRST ;
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pTwi->TWI_RHR ;
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/* TWI Slave Mode Disabled, TWI Master Mode Disabled. */
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pTwi->TWI_CR = TWI_CR_SVDIS ;
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pTwi->TWI_CR = TWI_CR_MSDIS ;
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/* Set master mode */
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pTwi->TWI_CR = TWI_CR_MSEN ;
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/* Configure clock */
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while ( !dwOk )
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{
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dwClDiv = ((dwMCk / (2 * dwTwCk)) - 4) / (1<<dwCkDiv) ;
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if ( dwClDiv <= 255 )
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{
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dwOk = 1 ;
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}
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else
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{
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dwCkDiv++ ;
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}
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}
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assert( dwCkDiv < 8 ) ;
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// TRACE_DEBUG( "Using CKDIV = %u and CLDIV/CHDIV = %u\n\r", dwCkDiv, dwClDiv ) ;
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pTwi->TWI_CWGR = 0 ;
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pTwi->TWI_CWGR = (dwCkDiv << 16) | (dwClDiv << 8) | dwClDiv ;
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}
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/**
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* \brief Configures a TWI peripheral to operate in slave mode.
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* \param pTwi Pointer to an Twi instance.
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* \param slaveAddress Slave address.
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*/
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void TWI_ConfigureSlave(Twi *pTwi, uint8_t slaveAddress)
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{
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uint32_t i;
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/* TWI software reset */
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pTwi->TWI_CR = TWI_CR_SWRST;
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pTwi->TWI_RHR;
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/* Wait at least 10 ms */
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for (i=0; i < 1000000; i++);
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/* TWI Slave Mode Disabled, TWI Master Mode Disabled*/
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pTwi->TWI_CR = TWI_CR_SVDIS | TWI_CR_MSDIS;
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/* Configure slave address. */
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pTwi->TWI_SMR = 0;
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pTwi->TWI_SMR = TWI_SMR_SADR(slaveAddress);
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/* SVEN: TWI Slave Mode Enabled */
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pTwi->TWI_CR = TWI_CR_SVEN;
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/* Wait at least 10 ms */
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for (i=0; i < 1000000; i++);
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assert( (pTwi->TWI_CR & TWI_CR_SVDIS)!= TWI_CR_SVDIS ) ;
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}
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/**
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* \brief Sends a STOP condition on the TWI.
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* \param pTwi Pointer to an Twi instance.
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*/
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void TWI_Stop( Twi *pTwi )
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{
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assert( pTwi != NULL ) ;
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pTwi->TWI_CR = TWI_CR_STOP;
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}
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/**
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* \brief Starts a read operation on the TWI bus with the specified slave, it returns
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* immediately. Data must then be read using TWI_ReadByte() whenever a byte is
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* available (poll using TWI_ByteReceived()).
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* \param pTwi Pointer to an Twi instance.
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* \param address Slave address on the bus.
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* \param iaddress Optional internal address bytes.
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* \param isize Number of internal address bytes.
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*/
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void TWI_StartRead(
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Twi *pTwi,
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uint8_t address,
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uint32_t iaddress,
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uint8_t isize)
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{
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assert( pTwi != NULL ) ;
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assert( (address & 0x80) == 0 ) ;
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assert( (iaddress & 0xFF000000) == 0 ) ;
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assert( isize < 4 ) ;
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/* Set slave address and number of internal address bytes. */
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pTwi->TWI_MMR = 0;
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pTwi->TWI_MMR = (isize << 8) | TWI_MMR_MREAD | (address << 16);
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/* Set internal address bytes */
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pTwi->TWI_IADR = 0;
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pTwi->TWI_IADR = iaddress;
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/* Send START condition */
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pTwi->TWI_CR = TWI_CR_START;
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}
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/**
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* \brief Reads a byte from the TWI bus. The read operation must have been started
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* using TWI_StartRead() and a byte must be available (check with TWI_ByteReceived()).
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* \param pTwi Pointer to an Twi instance.
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* \return byte read.
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*/
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uint8_t TWI_ReadByte(Twi *pTwi)
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{
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assert( pTwi != NULL ) ;
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return pTwi->TWI_RHR;
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}
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/**
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* \brief Sends a byte of data to one of the TWI slaves on the bus.
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* \note This function must be called once before TWI_StartWrite() with
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* the first byte of data to send, then it shall be called repeatedly
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* after that to send the remaining bytes.
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* \param pTwi Pointer to an Twi instance.
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* \param byte Byte to send.
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*/
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void TWI_WriteByte(Twi *pTwi, uint8_t byte)
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{
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assert( pTwi != NULL ) ;
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pTwi->TWI_THR = byte;
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}
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/**
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* \brief Starts a write operation on the TWI to access the selected slave, then
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* returns immediately. A byte of data must be provided to start the write;
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* other bytes are written next.
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* after that to send the remaining bytes.
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* \param pTwi Pointer to an Twi instance.
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* \param address Address of slave to acccess on the bus.
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* \param iaddress Optional slave internal address.
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* \param isize Number of internal address bytes.
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* \param byte First byte to send.
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*/
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void TWI_StartWrite(
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Twi *pTwi,
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uint8_t address,
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uint32_t iaddress,
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uint8_t isize,
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uint8_t byte)
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{
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assert( pTwi != NULL ) ;
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assert( (address & 0x80) == 0 ) ;
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assert( (iaddress & 0xFF000000) == 0 ) ;
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assert( isize < 4 ) ;
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/* Set slave address and number of internal address bytes. */
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pTwi->TWI_MMR = 0;
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pTwi->TWI_MMR = (isize << 8) | (address << 16);
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/* Set internal address bytes. */
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pTwi->TWI_IADR = 0;
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pTwi->TWI_IADR = iaddress;
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/* Write first byte to send.*/
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TWI_WriteByte(pTwi, byte);
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}
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/**
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* \brief Check if a byte have been receiced from TWI.
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* \param pTwi Pointer to an Twi instance.
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* \return 1 if a byte has been received and can be read on the given TWI
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* peripheral; otherwise, returns 0. This function resets the status register.
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*/
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uint8_t TWI_ByteReceived(Twi *pTwi)
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{
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return ((pTwi->TWI_SR & TWI_SR_RXRDY) == TWI_SR_RXRDY);
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}
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/**
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* \brief Check if a byte have been sent to TWI.
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* \param pTwi Pointer to an Twi instance.
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* \return 1 if a byte has been sent so another one can be stored for
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* transmission; otherwise returns 0. This function clears the status register.
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*/
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uint8_t TWI_ByteSent(Twi *pTwi)
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{
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return ((pTwi->TWI_SR & TWI_SR_TXRDY) == TWI_SR_TXRDY);
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}
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/**
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* \brief Check if current transmission is complet.
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* \param pTwi Pointer to an Twi instance.
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* \return 1 if the current transmission is complete (the STOP has been sent);
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* otherwise returns 0.
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*/
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uint8_t TWI_TransferComplete(Twi *pTwi)
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{
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return ((pTwi->TWI_SR & TWI_SR_TXCOMP) == TWI_SR_TXCOMP);
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}
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/**
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* \brief Enables the selected interrupts sources on a TWI peripheral.
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* \param pTwi Pointer to an Twi instance.
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* \param sources Bitwise OR of selected interrupt sources.
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*/
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void TWI_EnableIt(Twi *pTwi, uint32_t sources)
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{
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assert( pTwi != NULL ) ;
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assert( (sources & 0xFFFFF088) == 0 ) ;
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pTwi->TWI_IER = sources;
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}
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/**
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* \brief Disables the selected interrupts sources on a TWI peripheral.
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* \param pTwi Pointer to an Twi instance.
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* \param sources Bitwise OR of selected interrupt sources.
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*/
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void TWI_DisableIt(Twi *pTwi, uint32_t sources)
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{
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assert( pTwi != NULL ) ;
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assert( (sources & 0xFFFFF088) == 0 ) ;
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pTwi->TWI_IDR = sources;
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}
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/**
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* \brief Get the current status register of the given TWI peripheral.
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* \note This resets the internal value of the status register, so further
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* read may yield different values.
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* \param pTwi Pointer to an Twi instance.
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* \return TWI status register.
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*/
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uint32_t TWI_GetStatus(Twi *pTwi)
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{
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assert( pTwi != NULL ) ;
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return pTwi->TWI_SR;
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}
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/**
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* \brief Returns the current status register of the given TWI peripheral, but
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* masking interrupt sources which are not currently enabled.
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* \note This resets the internal value of the status register, so further
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* read may yield different values.
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* \param pTwi Pointer to an Twi instance.
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*/
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uint32_t TWI_GetMaskedStatus(Twi *pTwi)
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{
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uint32_t status;
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assert( pTwi != NULL ) ;
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status = pTwi->TWI_SR;
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status &= pTwi->TWI_IMR;
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return status;
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}
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/**
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* \brief Sends a STOP condition. STOP Condition is sent just after completing
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* the current byte transmission in master read mode.
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* \param pTwi Pointer to an Twi instance.
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*/
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void TWI_SendSTOPCondition(Twi *pTwi)
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{
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assert( pTwi != NULL ) ;
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pTwi->TWI_CR |= TWI_CR_STOP;
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}
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